Title: Senior System IP Design Verification Engineer (Contract)
Duration: Through 09/12/2025
Pay: $90/hr – $100/hr
Job Overview
We're looking for a Senior Staff System IP Design Verification Engineer to lead verification efforts for advanced System IP (coherent interconnects, caches). This is a hands-on role requiring deep experience in UVM, SystemVerilog, and gate-level simulation (GLS).
Key Responsibilities
Requirements
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