Job Description

CPU Core Micro-architect & RTL Engineer

This position will be responsible to develop the technology for Hardware Microarchitecture/RTL design for the new CPU core.

Responsibilities will also include:

• Creation of HW Microarchitectural specification and
• RTL development thru to tape-out, including quality in all aspects (performance, power, area, timing & functional convergence.
• Working with BE designers and verification engineers to converge on both functional and timing requirements.
• Reviewing the test plans.
• Collaborate with architects to meet the product requirements and performance targets which includes corelating performance models and RTL

Behavioral traits that we are looking for:

• Strong verbal and written communication skills, and clarity in technical communications.
• Self-starter with the ability to work independently, and an aptitude to learn new things quickly.
• Ability to work in a dynamic and team-oriented environment.

Qualifications:

Minimum skills:

• MS or PhD in EE or Computer Engineering with 5+ years of experience.
• Expertise in out of order CPU architecture, microarchitecture.
• Proficient in Logic Design, System Verilog and debugging.
• Good understanding of overall system level architecture and bus interface protocols.
• Ability to solve architectural/timing issues with right tradeoffs between power, performance, and area.
• Knowledge in Chip bring up and post silicon debug.

Preferred skills and experience:

• Strong CPU microarchitecture knowledge especially on core micro architecture that includes fetch, branch prediction, renaming, out of order execution, Vector unit load/store unit, coherency protocols and memory subsystem, system interfaces, interrupt architecture, Debug architecture (ARM, x86, RISCV), bus interface protocols (CHI, AXI, APB).

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